SRAM
Static
Random Access Memory (Static RAM or SRAM) is a type of RAM that holds data in a
static form, that is, as long as the memory has power. Unlike dynamic RAM, it
does not need to be refreshed. SRAM stores a bit of data on four transistors
using two cross-coupled inverters. The two stable states characterize 0 and 1.
During read and write operations another two access transistors are used to
manage the availability to a memory cell. To store one memory bit it requires
six metal-oxide-semiconductorfield-effect transistors (MOFSET). MOFSET is one
of the two types of SRAM chips; the other is the bipolar junction transistor.
The bipolar junction transistor is very fast but consumes a lot of energy.
MOFSET is a popular SRAM type. The term is prononuced "S-RAM", not
"sram."
(SRAM)
There are
two types of RAM: static random access memory (SRAM) and dynamic random access
memory (DRAM). The main memory in a computer is dynamic RAM. All DRAM chips on
Rambus in-line memory modules (RIMMs), single in-line memory module (SIMM’s)
and dual in-line memory module (DIMMs) need to refresh every few milliseconds.
(This is done by rewriting the data to the module.) DRAM continuously refreshes
100+ times per second. Static random access memory (SRAM) is a lot faster and
does not require refreshing like dynamic RAM. While SRAM can operate at higher
speeds than DRAM, it is more expensive to manufacture because of its complex
internal structure, so most of the RAM on the motherboard is DRAM. As well, due
to its condensed size it is not ideal for main memory. SRAM is best suited for
secondary operations like the CPU’s fast cache memory and storing registers.
SRAM is most often found in hard drives as disc cache. It is also found in
compact discs (CD’s), printers, modem routers, digital versatile discs (DVD’s)
and digital cameras. SRAM’s access time is a lot faster than DRAM’s. SRAM is
about 10 nanoseconds; DRAM’s access time is about 60 nanoseconds. Additionally,
SRAM’s cycle time is a lot shorter than DRAM’s because it does not need to
refresh. The cycle time of SRAM is shorter because it does not need to stop
between accesses to refresh.
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